摘要

• Most existing work
  • focused on either accelerating a single operator (e.g., a join)
  • in data reduction along the data path (e.g., from disk to CPU)

啥叫data reduction啊？？？

• we focus
  • the system aspects of
  • accelerating a relational engine in hybrid CPU-FPGA architectures
• Centaur

  • a framework running on the FPGA

  • allows

    • dynamic allocation of FPGA operators to query plans
    • pipelining these operators among themselves when needed
    • 在这些算子之间还搞起了流水化呀？
    • 牛逼了你，還能在這些操作符之間流水化他們！

  • the hybrid execution of operator pipelines running on the CPU and the FPGA

    • 这特么啥意思！
• compatible with
  • relational engines
  • as we demonstrate through its seamless integration with MonetDB
  • a column store database

• how this integration is achieved
• demonstrate the advantages of such an approach

• a realistic solution for accelerating SQL
  • compatible with existing database architectures
• the possibilities for further exploration of FPGA based data processing

INTRODUCTION

• the scope of operators and data types in relational databases is limited

• The operators are defined by SQL

  • the data can only be stored in basic and well defined data types

• database engines are able to highly optimize the operator implementations for each data type
  and CPU architecture.

• most database operators have

  • low computational complexity

• the rise in data sizes leads to new challenges and opportunities

• complex analytics operations
  • ML
  • statistics
  • 图分析
• traditional databases
  • not perform well on these complex operators and data types
• accelerators offer an alternative way
  • implement such complex functionality in databases
• how to integrate an accelerator like an FPGA in a database engine

2段

• Databases are throughput oriented,
  • processing thousands to several hundred thousand queries per second.
• the type of operators potentially offloaded to the FPGA are
  constantly changing.

数据库是以吞吐量为中心的哦！！！

• database engine should
  • be able to
  • run hybrid queries combining FPGA and CPU operators
  • in any order to harness the benefits of
    • both FPGA accelerators and highly optimized CPU operators

canci

• 添加链接描述